/******************** (C) COPYRIGHT 2018 SONiX *******************************
* COMPANY:	SONiX
* DATE:			2018/02
* AUTHOR:		SA1
* IC:				SN32F240/230/220
*____________________________________________________________________________
* REVISION	Date				User		Description
* 1.0				2013/12/17	SA1			1. First release
*	1.1				2014/01/20	SA1			1. Include FLASH.h for compile __FLASH_LPM_SLOW_MODE
*	2.0				2015/05/29	SA1			1. Compatible to CMSIS DFP Architecture in Keil MDK v5.X (http://www.keil.com/dd2/pack/)
*																2. Run HexConvert to generate bin file and show checksum after building.
* 3.0       2018/02/06	SA1			1. Add NotPinOut_GPIO_init function
*																2. Add the CodeOption_SN32F240.s to modify Code option, please modify with Configuration Wizard,
*																   and Strongly recommand to keep CS0 for debugging with SN-LINK.
*																3. Add the GPIO de-latch function.
*____________________________________________________________________________
* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS TIME TO MARKET.
* SONiX SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT OR CONSEQUENTIAL 
* DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF SUCH SOFTWARE
* AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION CONTAINED HEREIN 
* IN CONNECTION WITH THEIR PRODUCTS.
*****************************************************************************/

/*_____ I N C L U D E S ____________________________________________________*/
#include <SN32F240.h>
#include <SN32F200_Def.h>
#include "System\SYS_con_drive.h"
#include "Interface\FLASH\FLASH.h"


/*_____ D E C L A R A T I O N S ____________________________________________*/
void 	PFPA_Init(void);
void	NotPinOut_GPIO_init(void);

/*_____ D E F I N I T I O N S ______________________________________________*/
#ifndef	SN32F249					//Do NOT Remove or Modify!!!
	#error Please install SONiX.SN32F2_DFP.1.2.9.pack or version >= 1.2.9
#endif
#define	PKG						SN32F249				//User SHALL modify the package on demand (SN32F249, SN32F248, SN32F247, SN32F246, SN32F245, SN32F239, SN32F238, SN32F237, SN32F236, SN32F235) 

#define	SWITCH_CASE		SYS0_CLK_IHRC		//SYS0_CLK_IHRC, SYS0_CLK_ILRC, SYS0_CLK_EHS, SYS0_CLK_ELS, SYS0_CLK_PLL
/*_____ M A C R O S ________________________________________________________*/


/*_____ F U N C T I O N S __________________________________________________*/

/*****************************************************************************
* Function		: main
* Description	: Clock Switch & Clockout demo code. 
* Input			: None
* Output		: None
* Return		: None
* Note			: None
*****************************************************************************/
int	main (void)
{
	//User can configure System Clock with Configuration Wizard in system_SN32F240.c
	SystemInit();
	PFPA_Init();													//User shall set PFPA if used, do NOT remove!!!
	//Release the status of all GPIO pins.
	SN_PMU->LATCHCTRL2=0x5A5A0001;
	while (SN_PMU->LATCHST == 0x1);
	SN_PMU->LATCHCTRL2 = 0x5A5A0000;
	SN_PMU->LATCHCTRL1 = 0x5A5A0000;
	
	//1. User SHALL define PKG on demand.
	//2. User SHALL set the status of the GPIO which are NOT pin-out to input pull-up.	
	NotPinOut_GPIO_init();
	//--------------------------------------------------------------------------
	//User Code starts HERE!!!
	
	#if (SWITCH_CASE == SYS0_CLK_IHRC)
	SYS0_EnableIHRC();
	SYS0_SystemClockSwitch(SYS0_SYSCLK_IHRC, SYS0_AHBPRE_DIV1);
	#endif
	#if (SWITCH_CASE == SYS0_CLK_ILRC)
	SYS0_SystemClockSwitch(SYS0_SYSCLK_ILRC, SYS0_AHBPRE_DIV1);
	__FLASH_LPM_SLOW_MODE;								//(Optional) Saving consuming power
	__SYS0_IHRC_DISABLE;									//(Optional) Disable IHRC
	#endif
	#if (SWITCH_CASE == SYS0_CLK_EHS)
	SYS0_EnableEHSXtal(SYS0_EHS_FREQ_DRIVE_HIGH);
	SYS0_SystemClockSwitch(SYS0_CLK_EHS, SYS0_AHBPRE_DIV1);
	__SYS0_IHRC_DISABLE;									//(Optional) Disable IHRC
	#endif
	#if (SWITCH_CASE == SYS0_CLK_ELS)
	SYS0_EnableELSXtal();
	SYS0_SystemClockSwitch(SYS0_CLK_ELS, SYS0_AHBPRE_DIV1);
	#endif
	#if (SWITCH_CASE == SYS0_CLK_PLL)
	//Example: EHS=20MHz ---> PLL=50MHz
	//Note: User shall call SYS0_EnableEHSXtal or SYS0_EnableIHRC to make sure
  //			the clock source of PLL is enabled and ready.
	SYS0_EnableEHSXtal(SYS0_EHS_FREQ_DRIVE_HIGH);
	SYS0_EnablePLL(30, SYS0_PLL_P6, SYS0_PLL_F2, SYS0_PLL_CLOCK_EHS);
	SYS0_SystemClockSwitch(SYS0_CLK_PLL, SYS0_AHBPRE_DIV1);
	__SYS0_IHRC_DISABLE;									//(Optional) Disable IHRC
	#endif

	//Clockout (Optional)
	SYS1_EnableClockout(SYS1_CLOCKOUT_HCLK, SYS1_CLOCKOUT_DIV2);

	while(1);

}

/*****************************************************************************
* Function		: NotPinOut_GPIO_init
* Description	: Set the status of the GPIO which are NOT pin-out to input pull-up. 
* Input				: None
* Output			: None
* Return			: None
* Note				: 1. User SHALL define PKG on demand.
*****************************************************************************/
void	NotPinOut_GPIO_init(void)
{
#if (PKG == SN32F248) || (PKG == SN32F238)
	//set P0.10~P0.13 to input pull-up
	SN_GPIO0->CFG = 0xA00AAAAA;
	//set P1.8~P1.9 to input pull-up
	SN_GPIO1->CFG = 0xAAA0AAAA;	
	//set P2.11~P2.13 to input pull-up
	SN_GPIO2->CFG = 0xA02AAAAA;
	
#elif (PKG == SN32F247) || (PKG == SN32F237)
	//set P0.6~P0.7, P0.10~P0.15 to input pull-up
	SN_GPIO0->CFG = 0x000A0AAA;
	//set P1.4~1.5, P1.8~P1.9, P1.14~P1.15 to input pull-up
	SN_GPIO1->CFG = 0x0AA0A0AA;
	//set P2.8~P2.13 to input pull-up
	SN_GPIO2->CFG = 0xA000AAAA;
	//set P3.4~P3.8 to input pull-up
	SN_GPIO3->CFG = 0xAAA800AA;
	
#elif (PKG == SN32F246) || (PKG == SN32F236)
	//set P0.6~P0.7, P0.10~P0.15 to input pull-up
	SN_GPIO0->CFG = 0x000A0AAA;
	//set P1.4~1.5, P1.8~P1.9, P1.14~P1.15 to input pull-up
	SN_GPIO1->CFG = 0x0AA0A0AA;
	//set P2.4, P2.7~P2.13 to input pull-up
	SN_GPIO2->CFG = 0xA00028AA;	
	//set P3.4~P3.8 to input pull-up
	SN_GPIO3->CFG = 0xAAA800AA;
	
#elif (PKG == SN32F245) || (PKG == SN32F235)
	//setP0.0~P0.1, P0.6~P0.7, P0.10~P0.15 to input pull-up
	SN_GPIO0->CFG = 0x000A0AA0;
	//set P1.2~1.9, P1.12~P1.15 to input pull-up
	SN_GPIO1->CFG = 0x00A0000A;
	//set P2.4~P2.15 to input pull-up
	SN_GPIO2->CFG = 0x000000AA;	
	//set P3.0~P3.1, P3.4~P3.8 to input pull-up
	SN_GPIO3->CFG = 0xAAA800A0;
#endif
}

/*****************************************************************************
* Function		: HardFault_Handler
* Description	: ISR of Hard fault interrupt
* Input			: None
* Output		: None
* Return		: None
* Note			: None
*****************************************************************************/
__irq void HardFault_Handler(void)
{
	NVIC_SystemReset();
}

