#ifndef __SN32F770_CMP_H
#define __SN32F770_CMP_H

/*_____ I N C L U D E S ____________________________________________________*/
#include <SN32F770.h>
#include <SN32F700_Def.h>


/*_____ D E F I N I T I O N S ______________________________________________*/
//CM0PREF
#define	CMP_VPREF_VIREFn					0
#define	CMP_VPREF_CMnP0						1
#define	CMP_VPREF_CMnP1						2
#define	CMP_VPREF_CMnP2						3
#define	mskCMP_CM0PREF_VIREF0			(CMP_VPREF_VIREFn<<1)
#define	mskCMP_CM0PREF_CM0P0			(CMP_VPREF_CMnP0<<1)
#define	mskCMP_CM0PREF_CM0P1			(CMP_VPREF_CMnP1<<1)
#define	mskCMP_CM0PREF_CM0P2			(CMP_VPREF_CMnP2<<1)

//CM0NS
#define	CMP_VPREF_CMnN0						0
#define	CMP_VPREF_CMnN1						1
#define	CMP_VPREF_CMnN2						2
#define	mskCMP_CM0NS_CM0N0			(CMP_VPREF_CMnN0<<3)
#define	mskCMP_CM0NS_CM0N1			(CMP_VPREF_CMnN1<<3)
#define	mskCMP_CM0NS_CM0N2			(CMP_VPREF_CMnN2<<3)

//CM0RS
#define	mskCMP_CM0RS_VIREF				(0<<5)
#define	mskCMP_CM0RS_VIREF_M01D16	(1<<5)
#define	mskCMP_CM0RS_VIREF_M02D16	(2<<5)
#define	mskCMP_CM0RS_VIREF_M03D16	(3<<5)
#define	mskCMP_CM0RS_VIREF_M04D16	(4<<5)
#define	mskCMP_CM0RS_VIREF_M05D16	(5<<5)
#define	mskCMP_CM0RS_VIREF_M06D16	(6<<5)
#define	mskCMP_CM0RS_VIREF_M07D16	(7<<5)
#define	mskCMP_CM0RS_VIREF_M08D16	(8<<5)
#define	mskCMP_CM0RS_VIREF_M09D16	(9<<5)
#define	mskCMP_CM0RS_VIREF_M10D16	(10<<5)
#define	mskCMP_CM0RS_VIREF_M11D16	(11<<5)
#define	mskCMP_CM0RS_VIREF_M12D16	(12<<5)
#define	mskCMP_CM0RS_VIREF_M13D16	(13<<5)
#define	mskCMP_CM0RS_VIREF_M14D16	(14<<5)
#define	mskCMP_CM0RS_VIREF_M15D16	(15<<5)

//CM0OEN, CM1OEN
#define	CMP_CMnO_DISABLE					0
#define	CMP_CMnO_ENABLE						1
#define	mskCMP_CM0OEN_DISABLE			(CMP_CMnO_DISABLE<<9)
#define	mskCMP_CM0OEN_ENABLE			(CMP_CMnO_ENABLE<<9)

//CM0G
#define	CMP_CMnG_FALLING					0
#define	CMP_CMnG_RISING						1
#define	mskCMP_CM0G_FALLING				(CMP_CMnG_FALLING<<10)
#define	mskCMP_CM0G_RISING				(CMP_CMnG_RISING<<10)

//CMPIREF
#define	CMP_IREF_VDD							3
#define	CMP_IREF_1P5V							2
#define	CMP_IREF_2V								1
#define	CMP_IREF_3V								0
#define	mskCMP_CMPIREF_VDD				(CMP_IREF_VDD<<1)
#define	mskCMP_CMPIREF_1P5V				(CMP_IREF_1P5V<<1)
#define	mskCMP_CMPIREF_2V					(CMP_IREF_2V<<1)
#define	mskCMP_CMPIREF_3V					(CMP_IREF_3V<<1)
#define	mskCMP_CMPIREFEN_DISABLE	(DISBALE<<0)
#define	mskCMP_CMPIREFEN_ENABLE		(ENABLE<<0)

//CM0IE
#define	mskCMP_CM0IE_DISABLE			(DISABLE<<0)
#define	mskCMP_CM0IE_ENABLE				(ENABLE<<0)


//CM0IC
#define	mskCMP_CM0IC_ENABLE				(ENABLE<<0)


/*_____ M A C R O S ________________________________________________________*/

//CMP HCLK Enable/Disable
#define	__CMP_ENABLE_CMPHCLK					SN_SYS1->AHBCLKEN_b.CMPCLKEN = 1;
#define	__CMP_DISABLE_CMPHCLK					SN_SYS1->AHBCLKEN_b.CMPCLKEN = 0;

//CMP0/1 Enable/Disable
#define	__CMP0_ENABLE									SN_CMP->CTRL_b.CM0EN = 1;
#define	__CMP0_DISABLE								SN_CMP->CTRL_b.CM0EN = 0;


/*_____ D E C L A R A T I O N S ____________________________________________*/

void CMP_init(void);
void CMP_VIREF_Enable(uint32_t VIREF);



#endif	/*__SN32F770_CMP_H*/
