

/*_____ I N C L U D E S ____________________________________________________*/

/*_____ D E F I N I T I O N S ______________________________________________*/
//TX FIFO
#define 	SPI_TX_FIFO_LENGTH	32
//RX FIFO
#define 	SPI_RX_FIFO_LENGTH	32


//SPI Clock
/*
SPI Clock = 1/(330ns + (180ns * __SPI_CLOCK))
0: SPI Clock = 3MHz(330ns)
1: SPI Clock = 2MHz(495ns)
2: SPI Clock = 1.47MHz(620ns)
3: SPI Clock = 1.15MHz(870ns)
:
254: SPI Clock = 21KHz(47.6us)
255: SPI Clock = 20.9KHz(47.7us)
*/
#define		__SPI_CLOCK					0				// 0~255



//SPI I/O
/*CS P0.0, SCK P0.1, MOSI P0.2, MISO P0.3
#define		__SPI_CS_PORT				0				//Port0~2
#define		__SPI_CS_BIT				0				//Bit
#define		__SPI_SCK_PORT			0				//Port0~2
#define		__SPI_SCK_BIT				1				//Bit
#define		__SPI_MOSI_PORT			0				//Port0~2
#define		__SPI_MOSI_BIT			2				//Bit
#define		__SPI_MISO_PORT			0				//Port0~2
#define		__SPI_MISO_BIT			3				//Bit
*/

#define		__SPI_CS_PORT				0				//Port0~2
#define		__SPI_CS_BIT				0				//Bit
#define		__SPI_SCK_PORT			0				//Port0~2
#define		__SPI_SCK_BIT				1				//Bit
#define		__SPI_MOSI_PORT			0				//Port0~2
#define		__SPI_MOSI_BIT			2				//Bit
#define		__SPI_MISO_PORT			0				//Port0~2
#define		__SPI_MISO_BIT			3				//Bit

	
/*_____ D E C L A R A T I O N S ____________________________________________*/


