/******************** (C) COPYRIGHT 2018 SONiX *******************************
* COMPANY:		SONiX
* DATE:				2021/12
* AUTHOR:			SA1
* IC:					SN32F770
*____________________________________________________________________________
*	REVISION	Date				User		Description
*	1.0				2017/07/14	SA1			1. First version released
*																2. Compatible to CMSIS DFP Architecture in Keil MDK v5.X (http://www.keil.com/dd2/pack/)
*																3. Run HexConvert to generate bin file and show checksum after building.
*	1.1				2018/02/02	SA1			1. Add NotPinOut_GPIO_init to set the status of the GPIO which are NOT pin-out to input pull-up.
*																2. Add CodeOption_SN32F770.s to modify Code option, please modify with Configuration Wizard, 
*																	 and Strongly recommend to keep CS0 for debugging with SN-LINK.
*	1.2				2018/10/05	SA1			1. Remove CodeOption_SN32F770.s, please contact SONiX FAE if needed.
*																2. Update system_SN32F770.c to V1.1.0
*																3. Update LPMODE[3:0] to 0101b when HCLK>24MHz in Flash.h
*	1.3				2021/12/21	SA1			1. Add GPIO.c for GPIO interrupt service routine.
*																2. Modify main.c for P0 initial settings.
*
*____________________________________________________________________________
* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS TIME TO MARKET.
* SONiX SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT OR CONSEQUENTIAL 
* DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF SUCH SOFTWARE
* AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION CONTAINED HEREIN 
* IN CONNECTION WITH THEIR PRODUCTS.
*****************************************************************************/

/*_____ I N C L U D E S ____________________________________________________*/
#include <SN32F770.h>
#include <SN32F700_Def.h>
#include ".\PMU\PMU_drive.h"
#include ".\Utility\Utility.h"
#include ".\Interface\GPIO\GPIO.h"


/*_____ D E C L A R A T I O N S ____________________________________________*/
void	NotPinOut_GPIO_init(void);

volatile uint32_t	wP0_DS_WKP_Int_Times;


/*_____ D E F I N I T I O N S ______________________________________________*/
#ifndef	SN32F774					//Do NOT Remove or Modify!!!
	#error Please install SONiX.SN32F7_DFP.1.4.3.pack or version >= 1.4.3
#endif
#define	PKG		SN32F774		//User SHALL modify the package on demand (SN32F774, SN32F7741, SN32F773)


/*_____ M A C R O S ________________________________________________________*/


/*_____ F U N C T I O N S __________________________________________________*/

/*****************************************************************************
* Function		: main
* Description	: Demo code of Deep Sleep mode, use P0.7~P0.9 Rising edge trigger 
*								interrupt to wakeup MCU, and toggle P2.0, P2.1, or P2.2 to indicate
*								the wakeup source is P0.7, P0.8, or P0.9.
* Input			: None
* Output		: None
* Return		: None
* Note			: None
*****************************************************************************/
int	main (void)
{
	//User can configure System Clock with Configuration Wizard in system_SN32F770.c
	SystemInit();
	SystemCoreClockUpdate();				//Must call for SN32F770, Please do NOT remove!!!

	//Note: User can refer to ClockSwitch sample code to switch various HCLK if needed.

	//1. User SHALL define PKG on demand.
	//2. User SHALL set the status of the GPIO which are NOT pin-out to input pull-up.
	NotPinOut_GPIO_init();

	//--------------------------------------------------------------------------
	//User Code starts HERE!!!

	//Set P2 as Output Low
	SN_GPIO2->MODE = 0xFFFF;
	SN_GPIO2->DATA = 0x0;

	//================================================================================
	//set P0.7~P0.9 as Deep Sleep Wakeup pins (input pull-up, Rising edge trigger interrupt)	
	SN_GPIO0->MODE = 0;									//Set P0 as Input mode
	SN_GPIO0->CFG = 0;					        //Enable P0 Pull-up resistor
	SN_GPIO0->IEV = 0x380;							//Set P0 as Rising edge/High level interrupt
	SN_GPIO0->IBS = 0;
	SN_GPIO0->IS = 0x0;									//Set P0 as Edge sensitive

	SN_GPIO0->IC = 0xFFF;
	SN_GPIO0->IE = 0x380;								//Enable P0.7~P0.9 Interrupt
  UT_DelayNms(100);	
  
	NVIC_ClearPendingIRQ(P0_IRQn);
	NVIC_EnableIRQ(P0_IRQn);
	//================================================================================

	while(1)
	{
		wP0_DS_WKP_Int_Times = 0;
    PMU_Setting(PMU_DEEP_SLEEP);
	}
}

/*****************************************************************************
* Function		: NotPinOut_GPIO_init
* Description	: Set the status of the GPIO which are NOT pin-out to input pull-up. 
* Input				: None
* Output			: None
* Return			: None
* Note				: 1. User SHALL define PKG on demand.
*****************************************************************************/
void	NotPinOut_GPIO_init(void)
{
#if (PKG == SN32F773)
	//set P0.0, P0.9 to input pull-up
	SN_GPIO0->CFG = 0x0022AAA8;
	//set P2.3, P2.5 to input pull-up
	SN_GPIO2->CFG = 0x0000222A;
#endif
}

/*****************************************************************************
* Function		: HardFault_Handler
* Description	: ISR of Hard fault interrupt
* Input			: None
* Output		: None
* Return		: None
* Note			: None
*****************************************************************************/
__irq void HardFault_Handler(void)
{
	NVIC_SystemReset();
}

