/******************** (C) COPYRIGHT 2022 SONiX *******************************
* COMPANY:		SONiX
* DATE:				2022/11
* AUTHOR:			SA1
* IC:					SN32F700B
*____________________________________________________________________________
*	REVISION	Date				User		Description
*	1.0				2015/08/25	SA1			1. First version released
*																2. Compatible to CMSIS DFP Architecture in Keil MDK v5.X (http://www.keil.com/dd2/pack/)
*																3. Run HexConvert to generate bin file and show checksum after building.
*	1.2				2016/12/02	SA1			1. Update SYS0_LvdControl in SYS_con_drive.c
*	1.4				2017/07/14	SA1			1. Update system_SN32F700B.c to V1.0.3
*																2. Fix __FLASH_LPM_PLL_MODE in Flash.h
*	2.0				2018/01/26	SA1			1. Add NotPinOut_GPIO_init to set the status of the GPIO which are NOT pin-out to input pull-up.
*																2. Add CodeOption_SN32F700B.s to modify Code option, please modify with Configuration Wizard, 
*																	 and Strongly recommend to keep CS0 for debugging with SN-LINK.
*	2.2				2018/10/05	SA1			1. Remove CodeOption_SN32F700B.s, please contact SONiX FAE if needed.
*	2.7				2019/12/31	SA1			1. Update system_SN32F700B.c to V1.1.0
*	3.0				2022/11/11	SA1			1. Update system_SN32F700B.c to V2.0.0
*																2. Update Flash.h
*
*____________________________________________________________________________
* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS TIME TO MARKET.
* SONiX SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT OR CONSEQUENTIAL 
* DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF SUCH SOFTWARE
* AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION CONTAINED HEREIN 
* IN CONNECTION WITH THEIR PRODUCTS.
*****************************************************************************/

/*_____ I N C L U D E S ____________________________________________________*/
#include <SN32F700B.h>
#include <SN32F700_Def.h>
#include ".\System\SYS_con_drive.h"


/*_____ D E C L A R A T I O N S ____________________________________________*/
void	NotPinOut_GPIO_init(void);


/*_____ D E F I N I T I O N S ______________________________________________*/
#ifndef	SN32F707B					//Do NOT Remove or Modify!!!
	#error Please install SONiX.SN32F7_DFP.1.4.3.pack or version >= 1.4.3
#endif
#define	PKG						SN32F707B				//User SHALL modify the package on demand (SN32F707B, SN32F706B, SN32F705B, SN32F7051B, SN32F704B, SN32F702B)


#define	SWITCH_CASE		SYS0_CLK_IHRC		//SYS0_CLK_IHRC, SYS0_CLK_ILRC, SYS0_CLK_EHS, SYS0_CLK_ELS, SYS0_CLK_PLL


/*_____ M A C R O S ________________________________________________________*/


/*_____ F U N C T I O N S __________________________________________________*/

/*****************************************************************************
* Function		: main
* Description	: Clock Switch & Clockout demo code. 
* Input			: None
* Output		: None
* Return		: None
* Note			: None
*****************************************************************************/
int	main (void)
{
	//1. User SHALL define PKG on demand.
	//2. User SHALL set the status of the GPIO which are NOT pin-out to input pull-up.
	NotPinOut_GPIO_init();

	//--------------------------------------------------------------------------
	//User Code starts HERE!!!

	#if (SWITCH_CASE == SYS0_CLK_IHRC)
	SYS0_EnableIHRC();
	SYS0_SystemClockSwitch(SYS0_SYSCLK_IHRC, SYS0_AHBPRE_DIV1);
	SYS0_SystemCoreClockUpdate(12000000);		//Note: Must be called with Exact HCLK frequency, Do NOT remove!!!
	#endif
	#if (SWITCH_CASE == SYS0_CLK_ILRC)
	SYS0_SystemClockSwitch(SYS0_SYSCLK_ILRC, SYS0_AHBPRE_DIV2);
	SYS0_SystemCoreClockUpdate(8000);				//Note: Must be called with Exact HCLK frequency, Do NOT remove!!!
	#endif
	#if (SWITCH_CASE == SYS0_CLK_EHS)
	SYS0_EnableEHSXtal(16);
	SYS0_SystemClockSwitch(SYS0_CLK_EHS, SYS0_AHBPRE_DIV1);
	SYS0_SystemCoreClockUpdate(16000000);		//Note: Must be called with Exact HCLK frequency, Do NOT remove!!!
	#endif
	#if (SWITCH_CASE == SYS0_CLK_ELS)
	SYS0_EnableELSXtal();
	SYS0_SystemClockSwitch(SYS0_CLK_ELS, SYS0_AHBPRE_DIV1);
	SYS0_SystemCoreClockUpdate(32768);			//Note: Must be called with Exact HCLK frequency, Do NOT remove!!!
	#endif
	#if (SWITCH_CASE == SYS0_CLK_PLL)
	//Example: EHS=16MHz ---> PLL=48MHz
	//Note: User shall call SYS0_EnableEHSXtal or SYS0_EnableIHRC to make sure
  //			the clock source of PLL is enabled and ready.	
	SYS0_EnableEHSXtal(16);
	SYS0_EnablePLL(SYS0_PLL_M6, SYS0_PLL_P2, SYS0_PLL_CLOCK_EHS);
	SYS0_SystemClockSwitch(SYS0_CLK_PLL, SYS0_AHBPRE_DIV1);
	SYS0_SystemCoreClockUpdate(48000000);		//Note: Must be called with Exact HCLK frequency, Do NOT remove!!!
	#endif

	//Clockout (Optional)
	SYS1_EnableClockout(SYS1_CLOCKOUT_HCLK, SYS1_CLOCKOUT_DIV2);

	while(1);

}


/*****************************************************************************
* Function		: NotPinOut_GPIO_init
* Description	: Set the status of the GPIO which are NOT pin-out to input pull-up. 
* Input				: None
* Output			: None
* Return			: None
* Note				: 1. User SHALL define PKG on demand.
*****************************************************************************/
void	NotPinOut_GPIO_init(void)
{
#if (PKG == SN32F706B)
	//set P0.0~P0.1 to input pull-up
	SN_GPIO0->CFG = 0xAAAAA0;
#elif (PKG == SN32F705B)
	//set P0.0~P0.1 to input pull-up
	SN_GPIO0->CFG = 0x00AAAAA0;
	//set P1.5, P1.8~P1.11 to input pull-up
	SN_GPIO1->CFG = 0x0000A2AA;
	//set P2.5~P2.9 to input pull-up
	SN_GPIO2->CFG = 0x000002AA;
	//set P3.0~P3.3 to input pull-up
	SN_GPIO3->CFG = 0x000AAA00;
#elif (PKG == SN32F7051B)
	//set P0.6~P0.7 to input pull-up
	SN_GPIO0->CFG = 0x00AA0AAA;
	//set P1.5, P1.8~P1.11 to input pull-up
	SN_GPIO1->CFG = 0x0000A2AA;
	//set P2.8~P2.9 to input pull-up
	SN_GPIO2->CFG = 0x0000AAAA;
	//set P3.0~P3.5 to input pull-up
	SN_GPIO3->CFG = 0x000AA000;
#elif (PKG == SN32F704B)
	//set P0.0~P0.1, P0.3 to input pull-up
	SN_GPIO0->CFG = 0x00AAAA20;
	//set P1.5, P1.8~P1.11 to input pull-up
	SN_GPIO1->CFG = 0x0000A2AA;
	//set P2.2~P2.9 to input pull-up
	SN_GPIO2->CFG = 0x0000000A;
	//set P3.0~P3.3 to input pull-up
	SN_GPIO3->CFG = 0x000AAA00;
#elif (PKG == SN32F702B)
	//set P0.3~P0.9 to input pull-up
	SN_GPIO0->CFG = 0x00A0002A;
	//set P1.5, P1.8, P1.10~P1.11 to input pull-up
	SN_GPIO1->CFG = 0x0008A2AA;
	//set P2.3~P2.9 to input pull-up
	SN_GPIO2->CFG = 0x0000002A;
	//set P3.0~P3.5, P3.7~P3.9 to input pull-up
	SN_GPIO3->CFG = 0x00002000;
#endif
}

/*****************************************************************************
* Function		: HardFault_Handler
* Description	: ISR of Hard fault interrupt
* Input			: None
* Output		: None
* Return		: None
* Note			: None
*****************************************************************************/
__irq void HardFault_Handler(void)
{
	NVIC_SystemReset();
}

