/******************** (C) COPYRIGHT 2017 SONiX *******************************
* COMPANY:		SONiX
* DATE:				2017/07
* AUTHOR:			SA1
* IC:					SN32F240B
*____________________________________________________________________________
*	REVISION	Date				User		Description
*	1.0				2017/07/07	SA1			1. First version released
*																2. Compatible to CMSIS DFP Architecture in Keil MDK v5.X (http://www.keil.com/dd2/pack/)
*																3. Run HexConvert to generate bin file and show checksum after building.	
*____________________________________________________________________________
* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS TIME TO MARKET.
* SONiX SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT OR CONSEQUENTIAL 
* DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF SUCH SOFTWARE
* AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION CONTAINED HEREIN 
* IN CONNECTION WITH THEIR PRODUCTS.
*****************************************************************************/

/*_____ I N C L U D E S ____________________________________________________*/
#include <SN32F240B.h>
#include <SN32F200_Def.h>
#include "Interface\SPI\SPI.h"
#include "Utility\Utility.h"


/*_____ D E C L A R A T I O N S ____________________________________________*/


/*_____ D E F I N I T I O N S ______________________________________________*/
#define		SPI_TEST_CNT		32

uint16_t	hwSPI_Tx_Fifo[SPI_TEST_CNT];
uint16_t	hwSPI_Rx_Fifo[SPI_TEST_CNT];


/*_____ M A C R O S ________________________________________________________*/


/*_____ F U N C T I O N S __________________________________________________*/
void SPI0_NBytesTxRx(uint32_t N_Bytes);


/*****************************************************************************
* Function		: main
* Description	: SPI0 is master. (Connect MISO0 & MOIS0) 
								Exapmle Mode is SPI (CPHA=0, CPOL=0, MLS=0).
								Change mode by setting FORMAT, CPHA, CPOL, MLSB.
* Input			: None
* Output		: None
* Return		: None
* Note			: Connect MISO0 and MOSI0 
*****************************************************************************/
int	main (void)
{
	uint32_t	i=0;
	uint32_t	j=0;	

	//User can configure System Clock with Configuration Wizard in system_SN32F240B.c
	SystemInit();
	SystemCoreClockUpdate();				//Must call for SN32F240B, Please do NOT remove!!!

	//Note: User can refer to ClockSwitch sample code to switch various HCLK if needed.
	//--------------------------------------------------------------------------
	//User Code starts HERE!!!

	//System Interface Init
	SPI0_Init();

	//Write TX FIFO
	for(i=0;i<SPI_TEST_CNT;i++)
	{
		hwSPI_Tx_Fifo[i] = i;
	}	

	//Start Transmission
	j = SPI_TEST_CNT;

	SPI0_NBytesTxRx(j);

	//Check data 
	for(i=0;i<j;i++)
	{
		if(hwSPI_Tx_Fifo[i] != hwSPI_Rx_Fifo[i])
		{
			while(1);	//Error
		}		
	}
	
	while(1); //Pass
}


/***************************************************************************************************************
* Function		: SIP0_NBytesTxRx
* Description	:
* Input			: hwSPI_Tx_Fifo
* Output		: hwSPI_Rx_Fifo
* Return		: None
* Note			: Avoid all of the interrupts which may make FW can't fill in TX FIFO (SN_SPI0->DATA=...) in time.
***************************************************************************************************************/
void SPI0_NBytesTxRx(uint32_t N_Bytes)
{
	uint32_t  wSPI_Send_Pointer = 0;
	uint32_t  wSPI_Get_Pointer = 0;

	while(wSPI_Send_Pointer != N_Bytes)
	{
		__SPI0_CLR_SEL0;																			//SEL is low
		SN_SPI0->DATA = hwSPI_Tx_Fifo[wSPI_Send_Pointer++];
		while (!(SN_SPI0->STAT & mskSPI_TXFIFOTHF));	//TX Half-Empty
		if(!(SN_SPI0->STAT & mskSPI_RX_EMPTY))								//Check having any data in RXFIFO
		{	
			hwSPI_Rx_Fifo[wSPI_Get_Pointer++] = SN_SPI0->DATA;
		}
	}	

	while(1)
	{
		while(SN_SPI0->STAT & mskSPI_RX_EMPTY); //Get all remaining data
		hwSPI_Rx_Fifo[wSPI_Get_Pointer++] = SN_SPI0->DATA;

		if(wSPI_Get_Pointer == N_Bytes)
		{
			break;
		}
	}
	while(SN_SPI0->STAT & mskSPI_BUSY);

	__SPI0_SET_SEL0;										//SEL is high
	__SPI0_FIFO_RESET;
}

/*****************************************************************************
* Function		: HardFault_Handler
* Description	: ISR of Hard fault interrupt
* Input			: None
* Output		: None
* Return		: None
* Note			: None
*****************************************************************************/
__irq void HardFault_Handler(void)
{
	NVIC_SystemReset();
}

