#ifndef __timer_H__
#define __timer_H__
/*_____ I N C L U D E S _________________________________*/


/*_____ F U N C T I O N S _______________________________*/


/*_____ D E F I N I T I O N S ___________________________*/
//*** <<< Use Configuration Wizard in Context Menu >>> ***\n
// <h> Timer Selection
//    <o> Timer0 Counter <0-10>
//      <i> Every Counter=100us (range: 0 - 10)
#define FIRST_TIMER_COUNTER   10
//    <o> Timer1 Counter <0-3>
//      <i> Every Counter=100us (range: 0 - 3)
#define SECOND_TIMER_COUNTER  3
//*** <<< end of configuration section >>>    *** 

#define	FIRST_TIMER_COUNTER_CAL		FIRST_TIMER_COUNTER*25
#define	SECOND_TIMER_COUNTER_CAL	SECOND_TIMER_COUNTER*66
#define FIRST_TIMER_COUNTER_REG	  (0x100-FIRST_TIMER_COUNTER_CAL)		/*	Transfer Timer Counter Into Register Value	*/
#define SECOND_TIMER_COUNTER_REG	(0x100-SECOND_TIMER_COUNTER_CAL)	/*	Transfer Timer Counter Into Register Value	*/
#define TH0_VALUE 								SECOND_TIMER_COUNTER_REG					/*	Calculate TH0 Value	*/
#define TL0_VALUE 								FIRST_TIMER_COUNTER_REG 					/*	Calculate TL0 Value	*/
#define OB_T0TEST_PIN							P00																/*	Timer0 ISR Test Pin Def	*/
#define OB_T1TEST_PIN							P01																/*	Timer1 ISR Test Pin Def	*/
#define	TIMER0_STOP								~(mskTCON_TR0)
#define	TIMER1_STOP								~(mskTCON_TR1)

//===========================//
//** 				TMOD						 //
//===========================//
#define mskTMOD_T0GATE						(0x01U<<3)
#define mskTMOD_T0CT							(0x01U<<2)
#define mskTMOD_T0_MODE0					(0x00U<<0)
#define mskTMOD_T0_MODE1					(0x01U<<0)
#define mskTMOD_T0_MODE2					(0x02U<<0)
#define mskTMOD_T0_MODE3					(0x03U<<0)

#define mskTMOD_T1GATE						(0x01U<<7)
#define mskTMOD_T1CT							(0x01U<<6)
#define mskTMOD_T1_MODE0					(0x00U<<4)
#define mskTMOD_T1_MODE1					(0x01U<<4)
#define mskTMOD_T1_MODE2					(0x02U<<4)
#define mskTMOD_T1_MODE3					(0x03U<<4)

//===========================//
//** 				TCON0						 //
//===========================//
#define mskTCON0_T0EXT_losc				(0x01U<<7)
#define mskTCON0_T0_DIV128				(0x00U<<4)
#define mskTCON0_T0_DIV64					(0x01U<<4)
#define mskTCON0_T0_DIV32					(0x02U<<4)
#define mskTCON0_T0_DIV16					(0x03U<<4)
#define mskTCON0_T0_DIV8					(0x04U<<4)
#define mskTCON0_T0_DIV4					(0x05U<<4)
#define mskTCON0_T0_DIV2					(0x06U<<4)
#define mskTCON0_T0_DIV1					(0x07U<<4)

#define mskTCON0_T1_DIV128				(0x00U<<0)
#define mskTCON0_T1_DIV64					(0x01U<<0)
#define mskTCON0_T1_DIV32					(0x02U<<0)
#define mskTCON0_T1_DIV16					(0x03U<<0)
#define mskTCON0_T1_DIV8					(0x04U<<0)
#define mskTCON0_T1_DIV4					(0x05U<<0)
#define mskTCON0_T1_DIV2					(0x06U<<0)
#define mskTCON0_T1_DIV1					(0x07U<<0)

//===========================//
//** 				IEN0						 //
//===========================//
#define	mskIEN0_EAL								(0x01U<<7)
#define	mskIEN0_ET1								(0x01U<<3)
#define	mskIEN0_ET0								(0x01U<<1)

//===========================//
//** 				TCON						 //
//===========================//
#define	mskTCON_TF1								(0x01U<<7)
#define	mskTCON_TR1								(0x01U<<6)
#define	mskTCON_TF0								(0x01U<<5)
#define	mskTCON_TR0								(0x01U<<4)


//===========================//
//** 				T3M							 //
//===========================//
#define mskT3M_T3EN							(0x01U<<7)
#define mskT3M_T3_DIV128				(0x00U<<4)
#define mskT3M_T3_DIV64					(0x01U<<4)
#define mskT3M_T3_DIV32					(0x02U<<4)
#define mskT3M_T3_DIV16					(0x03U<<4)
#define mskT3M_T3_DIV8					(0x04U<<4)
#define mskT3M_T3_DIV4					(0x05U<<4)
#define mskT3M_T3_DIV2					(0x06U<<4)
#define mskT3M_T3_DIV1					(0x07U<<4)
#define mskT3M_T3CKS						(0x01U<<3)

//===========================//
//** 				IEN2						 //
//===========================//
#define	mskIEN2_ET3							(0x01U<<5)


/*_____ D E C L A R A T I O N S _________________________*/



/*_____ M A C R O S _____________________________________*/


#endif  /*	__timer_H__	*/