/******************** (C) COPYRIGHT 2021 SONiX *******************************
* COMPANY:	SONiX
* DATE:		2021/12/27
* IC:			SN8F5754
*____________________________________________________________________________
* REVISION		Date				Author		Description
* 1.0					2021/12/27	SONiX			1. First release
*____________________________________________________________________________
*****************************************************************************/
/*_____ I N C L U D E S _________________________________*/
#define __XRAM_SFR_H__
#include <SN8F5754.h>
#include "crc.h"

/*_____ F U N C T I O N S _______________________________*/
void GPIO_Initialization(void);

/*_____ D E F I N I T I O N S ___________________________*/

/*_____ D E C L A R A T I O N S _________________________*/
extern uint16_t code CRC_CHECK_DATA;

/*_____ M A C R O S _____________________________________*/
#define	IO_PORT0_OUTPUT_LOW		P0M |= 0xFF;	P0 &= 0x00;
#define	IO_PORT1_OUTPUT_LOW		P1M |= 0xFF;	P1 &= 0x00;
#define	IO_PORT2_OUTPUT_LOW		P2M |= 0xFF;	P2 &= 0x00;
#define	IO_PORT3_OUTPUT_LOW		P3M |= 0xFF;	P3 &= 0x00;

#define OB_IO_OUTPUT_LOW   		P00=0;  P0M |=0x01; 
#define OB_IO_OUTPUT_HIGH 		P00=1;  P0M |=0x01;


/**
 *	@Brief		main: CRC Test Demo Function
 *	@param		None
 *	@retval		None
 */

void main(void)
{
	uint16_t dbCRC16_Result;
  uint16_t dbCRC16_AppResult;
  uint8_t	code *AddrprtCRCOption;
  
  /*	Initialize GPIO status  */
	GPIO_Initialization();
	
  /*  Initialize and Configurate CRC data */
  AddrprtCRCOption = (uint8_t	code *)&CRC_CHECK_DATA;
	
	while(1)
	{
		/*	For example, auto calculate ROM to last 1page and 2byte with CRC CRC16-CCITT  */		
		/*	Initializes and configures the CRC function
				(1)	CRC mode configuration
        (2) CRC seed initialization   
        (3)	Start CRC calculation	*/	
		CRCM = mskCRCM_CRC16 | mskCRCM_RANGE_BYPASS1 | mskCRCM_ENABLE;		/* (1)	*/
		CRCM |= mskCRCM_RESET;																						/* (2)	*/
    CRCM |= mskCRCM_RUN;																							/* (3)	*/

		/*	Check CRC calculation done	*/
    while ((CRCM & mskCRCM_BUSY) != 0x00);

		/*	Compare wtih hardware result and APP result, the APP results were be set on OPTIONS_SN8F5754.A51	*/
    dbCRC16_Result = (CRCDATH << 8) | CRCDATL;
    dbCRC16_AppResult = (*(AddrprtCRCOption+0)<<8) + *(AddrprtCRCOption+1);		
		
		/*	If HW CRC result is right, IO output high
				If HW CRC result is wrong, IO output low	*/
		if(dbCRC16_Result==dbCRC16_AppResult)
		{
			OB_IO_OUTPUT_HIGH
		}
		else
		{
			OB_IO_OUTPUT_LOW
		}
	}
}


/**
 *	@Brief		Initialize GPIO status
 *	@param		None
 *	@retval		None
 */
void GPIO_Initialization(void)
{
	/*	Set whole IOs to output low	*/
	IO_PORT0_OUTPUT_LOW
	IO_PORT1_OUTPUT_LOW
	IO_PORT2_OUTPUT_LOW
	IO_PORT3_OUTPUT_LOW
}

