C51 COMPILER V9.54   I2C                                                                   05/19/2022 10:01:02 PAGE 1   


C51 COMPILER V9.54, COMPILATION OF MODULE I2C
OBJECT MODULE PLACED IN .\Objects\i2c.obj
COMPILER INVOKED BY: C:\Keil_v5\C51\BIN\C51.EXE source\i2c.c OPTIMIZE(8,SPEED) BROWSE DEBUG OBJECTEXTEND PRINT(.\Listing
                    -s\i2c.lst) TABS(2) OBJECT(.\Objects\i2c.obj)

line level    source

   1          /*_____ I N C L U D E S _________________________________*/
   2          #include "i2c.h"
   3          
   4          /*_____ F U N C T I O N S _______________________________*/
   5          
   6          /*_____ D E F I N I T I O N S ___________________________*/
   7          typedef struct{
   8            uint8_t*  bptrTx_StartAddress;
   9            uint8_t*  bptrTx_EndAddress;  
  10            uint8_t*  bptrTx_Buf; 
  11            uint8_t   fTx_Done:1; 
  12            uint8_t   fTx_Stop:1; 
  13          }I2C_TxHardware_st;
  14          
  15          typedef struct{
  16            uint8_t*  bptrRx_StartAddress;
  17            uint8_t*  bptrRx_EndAddress;  
  18            uint8_t*  bptrRx_Buf; 
  19            uint8_t   fRx_Done:1; 
  20            uint8_t   fRx_Stop:1; 
  21          }I2C_RxHardware_st;
  22          
  23          typedef struct{
  24            uint8_t   bMateAddress; 
  25            uint8_t   fTxRxSel:1; 
  26          }I2C_MasterHardware_st;
  27          
  28          /*_____ D E C L A R A T I O N S _________________________*/
  29          I2C_MasterHardware_st stI2C_MasterHardware;
  30          I2C_TxHardware_st stI2C_TxHardware;
  31          I2C_RxHardware_st stI2C_RxHardware;
  32          
  33          /*_____ M A C R O S _____________________________________*/
  34          
  35          
  36          /**
  37           *  @Brief    Initialize GPIO status
  38           *  @param    None
  39           *  @retval   None
  40           */
  41          void GPIO_Initialization(void)
  42          {
  43   1        /*  Set whole IOs to output low */
  44   1        IO_PORT0_OUTPUT_LOW
  45   1        IO_PORT1_OUTPUT_LOW
  46   1        IO_PORT3_OUTPUT_LOW
  47   1        IO_PORT4_OUTPUT_LOW
  48   1      }
  49          
  50          /**
  51           *  @Brief    Initializes and configures the I2C function 
  52                        including pin assignment, clock, address, intterupt 
  53           *  @param    uint8_t bMuxNum, uint8_t bClockDiv, uint8_t bSelfAddress, uint8_t bMateAddress
  54           *  @retval   None
C51 COMPILER V9.54   I2C                                                                   05/19/2022 10:01:02 PAGE 2   

  55           */
  56          void I2C_ConfigureRegister(uint8_t bMuxNum, uint8_t bClockDiv, uint8_t bSelfAddress, uint8_t bMateAddress)
  57          {
  58   1        /* Set I2C pin   SCL:P04  SDA:P05 */
  59   1        SMBSEL=mskSMBSEL_I2CMX;
  60   1        
  61   1        /*  Configure the I2C's IO status and register */
  62   1        if(bMuxNum==0)
  63   1        {
  64   2          I2C_PIN_SET_INPUT_0
  65   2        }
  66   1        else
  67   1        {
  68   2          I2C_PIN_SET_INPUT_1
  69   2        }
  70   1        I2CCON = mskI2CCON_I2C_ENABLE | bClockDiv;
  71   1        
  72   1        /* Cofigure the master address and slave address */
  73   1        I2CADR = (bSelfAddress<<1); 
  74   1        stI2C_MasterHardware.bMateAddress = bMateAddress;
  75   1        
  76   1        /*  Enable I2C interrupt  */
  77   1        IEN1 = mskIEN1_INT_I2C;
  78   1      }
  79          
  80          
  81          /**
  82           *  @Brief    Initialize the master parameter and assign data buffer
  83           *  @param    bit fTxRxSel, uint8_t *bptrDataBuf, uint16_t dbLength
  84           *  @retval   None
  85           */
  86          void I2C_InitMasterTX(bit fTxRxSel, uint8_t *bptrDataBuf, uint16_t dbLength)
  87          { 
  88   1        if(fTxRxSel == I2C_TX_SEL)
  89   1        {
  90   2          stI2C_TxHardware.bptrTx_StartAddress = bptrDataBuf;
  91   2          stI2C_TxHardware.bptrTx_EndAddress = bptrDataBuf + (dbLength-1);
  92   2          stI2C_TxHardware.bptrTx_Buf = stI2C_TxHardware.bptrTx_StartAddress;
  93   2          stI2C_MasterHardware.fTxRxSel = 0;
  94   2        }
  95   1        
  96   1        I2CCON |= mskI2CCON_I2C_STA;
  97   1        I2CCON &= ~mskI2CCON_I2C_AA; 
  98   1      }
  99          
 100          /**
 101           *  @Brief    Initialize the master parameter and assign data buffer
 102           *  @param    bit fTxRxSel, uint8_t *bptrDataBuf, uint16_t dbLength
 103           *  @retval   None
 104           */
 105          void I2C_InitMasterRX(bit fTxRxSel, uint8_t *bptrDataBuf, uint16_t dbLength)
 106          { 
 107   1        if(fTxRxSel == I2C_RX_SEL)
 108   1        {
 109   2          stI2C_RxHardware.bptrRx_StartAddress = bptrDataBuf;
 110   2          stI2C_RxHardware.bptrRx_EndAddress = bptrDataBuf + (dbLength-1);
 111   2          stI2C_RxHardware.bptrRx_Buf = stI2C_RxHardware.bptrRx_StartAddress;
 112   2          stI2C_MasterHardware.fTxRxSel = 1; 
 113   2        }
 114   1      
 115   1        I2CCON |= mskI2CCON_I2C_STA;
 116   1        I2CCON &= ~mskI2CCON_I2C_AA; 
C51 COMPILER V9.54   I2C                                                                   05/19/2022 10:01:02 PAGE 3   

 117   1      }
 118          /**
 119           *  @Brief    Repeat start condition for data transmission
 120           *  @param    None
 121           *  @retval   None
 122           */
 123          void I2C_RepeatMaster(void)
 124          { 
 125   1        if(stI2C_MasterHardware.fTxRxSel == I2C_TX_SEL)
 126   1        {
 127   2          stI2C_TxHardware.bptrTx_Buf = stI2C_TxHardware.bptrTx_StartAddress;
 128   2        }
 129   1        else
 130   1        {
 131   2          stI2C_RxHardware.bptrRx_Buf = stI2C_RxHardware.bptrRx_StartAddress;
 132   2        }
 133   1        
 134   1        I2CCON |= mskI2CCON_I2C_STA;
 135   1        I2CCON &= ~mskI2CCON_I2C_AA; 
 136   1      }
 137          
 138          /**
 139           *  @Brief    Return flag for user check transmission finish
 140           *  @param    None
 141           *  @retval   fDoneFlag
 142           */
 143          bit I2C_CheckTransDataDone(void)
 144          {
 145   1        bit fDoneFlag=0;
 146   1        if(stI2C_TxHardware.fTx_Done)
 147   1        { 
 148   2          fDoneFlag = stI2C_TxHardware.fTx_Done;
 149   2          stI2C_TxHardware.fTx_Done = 0;
 150   2        }
 151   1        return fDoneFlag;
 152   1      }
 153          
 154          /**
 155           *  @Brief    Return flag for user check data NACK as transmitter
 156           *  @param    None
 157           *  @retval   fNACKFlag
 158           */
 159          bit I2C_CheckTransDataStop(void)
 160          {
 161   1        bit fNACKFlag=0;
 162   1        if(stI2C_TxHardware.fTx_Stop)
 163   1        { 
 164   2          fNACKFlag = stI2C_TxHardware.fTx_Stop;
 165   2          stI2C_TxHardware.fTx_Stop = 0;
 166   2        }
 167   1        return fNACKFlag;
 168   1      }
 169          
 170          /**
 171           *  @Brief    Return flag for user check recive finish
 172           *  @param    None
 173           *  @retval   fDoneFlag
 174           */
 175          bit I2C_CheckReciDataDone(void)
 176          {
 177   1        bit fDoneFlag=0;
 178   1        if(stI2C_RxHardware.fRx_Done)
C51 COMPILER V9.54   I2C                                                                   05/19/2022 10:01:02 PAGE 4   

 179   1        { 
 180   2          fDoneFlag = stI2C_RxHardware.fRx_Done;
 181   2          stI2C_RxHardware.fRx_Done = 0;
 182   2        }
 183   1        return fDoneFlag;
 184   1      }
 185          
 186          /**
 187           *  @Brief    Return flag for user check data NACK as reciver
 188           *  @param    None
 189           *  @retval   fNACKFlag
 190           */
 191          bit I2C_CheckReciDataStop(void)
 192          {
 193   1        bit fNACKFlag=0;
 194   1        if(stI2C_RxHardware.fRx_Stop)
 195   1        { 
 196   2          fNACKFlag = stI2C_RxHardware.fRx_Stop;
 197   2          stI2C_RxHardware.fRx_Stop = 0;
 198   2        }
 199   1        return fNACKFlag;
 200   1      }
 201          
 202          /**
 203           *  @Brief    Run I2C Statemachine to keep transmission
 204           *  @param    None
 205           *  @retval   None
 206           */
 207          void I2C_ExecuteTransmission(void)
 208          {
 209   1        switch(I2CSTA) 
 210   1        {
 211   2          /*  Master TX  */
 212   2          /*  A I2C Start condition has been transmitted  */
 213   2          case 0x08:  
 214   2            I2CCON &= ~mskI2CCON_I2C_STO;
 215   2            I2CDAT = (stI2C_MasterHardware.bMateAddress<<1) | stI2C_MasterHardware.fTxRxSel;
 216   2          break;
 217   2          case 0x10:    
 218   2            I2CCON &= ~mskI2CCON_I2C_STO;
 219   2            I2CDAT = (stI2C_MasterHardware.bMateAddress<<1) | stI2C_MasterHardware.fTxRxSel;
 220   2          break;  
 221   2          
 222   2          /*  Master TX mode status 
 223   2              Step 1: Slave address and write bit has been transmitted
 224   2              Step 2: Data byte in I2CDAT has been transmitted 
 225   2              Step 3: Stop data transmittion after last data  */  
 226   2          case 0x18:      /*  after addr_ACK, write I2CDAT to transmitte first data */      
 227   2            I2CCON &= ~mskI2CCON_I2C_STA;
 228   2            I2CDAT = *stI2C_TxHardware.bptrTx_Buf++;    
 229   2            if(stI2C_TxHardware.bptrTx_Buf > (stI2C_TxHardware.bptrTx_EndAddress+1))
 230   2            {
 231   3              I2CCON |= mskI2CCON_I2C_STO;
 232   3              stI2C_TxHardware.fTx_Done = 1;
 233   3            }
 234   2          break;
 235   2          case 0x20:      /*  after addr_NACK, write STO=1 to stop transmittion sequence  */ 
 236   2            I2CCON &= ~mskI2CCON_I2C_STA;
 237   2            I2CCON |= mskI2CCON_I2C_STO;
 238   2            stI2C_TxHardware.fTx_Stop = 1;
 239   2          break; 
 240   2          case 0x28:      /*  after data_ACK, write I2CDAT to transmitte new data */  
C51 COMPILER V9.54   I2C                                                                   05/19/2022 10:01:02 PAGE 5   

 241   2            I2CDAT = *stI2C_TxHardware.bptrTx_Buf++;
 242   2            if(stI2C_TxHardware.bptrTx_Buf > (stI2C_TxHardware.bptrTx_EndAddress+1))
 243   2            {
 244   3              I2CCON |= mskI2CCON_I2C_STO;
 245   3              stI2C_TxHardware.fTx_Done = 1;
 246   3            }
 247   2          break; 
 248   2          case 0x30:      /*  after data_NACK, when data NACK has been recevie, write STO=1 to stop transmittion seq
             -uence  */ 
 249   2            I2CCON |= mskI2CCON_I2C_STO;
 250   2            stI2C_TxHardware.fTx_Stop = 1;
 251   2          break;
 252   2          
 253   2          /*  Master RX mode status 
 254   2              Step 1: Slave address and read bit has been transmitted
 255   2              Step 2: Data byte has been recived, Read data from I2CDAT
 256   2              Step 3: Stop to recive data after last data */    
 257   2          case 0x40:      /*  after addr_ACK, ready to recive data  */ 
 258   2            I2CCON &= ~mskI2CCON_I2C_STA;
 259   2            I2CCON |= mskI2CCON_I2C_AA;      
 260   2          break; 
 261   2          case 0x48:      /*  after addr_NACK, repeat start condition */
 262   2            I2CCON |= mskI2CCON_I2C_STA;
 263   2            I2CCON |= mskI2CCON_I2C_STO; 
 264   2          break; 
 265   2          case 0x50:      /*  after data_ACK,  get data from I2CDAT */
 266   2            *stI2C_RxHardware.bptrRx_Buf++ = I2CDAT;
 267   2            if(stI2C_RxHardware.bptrRx_Buf >= stI2C_RxHardware.bptrRx_EndAddress)
 268   2            {
 269   3              I2CCON &= ~mskI2CCON_I2C_AA;
 270   3            }
 271   2          break; 
 272   2          case 0x58:      /*  after data_NACK, stop transmission */
 273   2            *stI2C_RxHardware.bptrRx_Buf++ = I2CDAT;
 274   2            I2CCON &= ~mskI2CCON_I2C_AA;
 275   2            I2CCON |= mskI2CCON_I2C_STO;
 276   2            stI2C_RxHardware.fRx_Done = 1;
 277   2          break; 
 278   2          
 279   2          /*  Slave RX mode status 
 280   2              Step 1: Match address
 281   2              Step 2: Data byte has been recived, Read data from I2CDAT
 282   2              Step 3: Stop to recive data after last data */    
 283   2          case 0x60:      /*  after addr_ACK, ready to recive data  */ 
 284   2            if(stI2C_RxHardware.bptrRx_Buf >= stI2C_RxHardware.bptrRx_EndAddress)
 285   2            {
 286   3              I2CCON &= ~mskI2CCON_I2C_AA;
 287   3            }
 288   2            else
 289   2            {
 290   3              I2CCON |= mskI2CCON_I2C_AA;
 291   3            }
 292   2          break; 
 293   2          case 0x80:      /*  after data_ACK,  get data from I2CDAT  */
 294   2            *stI2C_RxHardware.bptrRx_Buf++ = I2CDAT;
 295   2            if(stI2C_RxHardware.bptrRx_Buf >= stI2C_RxHardware.bptrRx_EndAddress)
 296   2            {
 297   3              I2CCON &= ~mskI2CCON_I2C_AA;
 298   3            }
 299   2            else
 300   2            {
 301   3              I2CCON |= mskI2CCON_I2C_AA;
C51 COMPILER V9.54   I2C                                                                   05/19/2022 10:01:02 PAGE 6   

 302   3            }
 303   2          break; 
 304   2          case 0x88:       /*  after data_NACK,  get data from I2CDAT  */
 305   2            *stI2C_RxHardware.bptrRx_Buf++ = I2CDAT;
 306   2            I2CCON &= ~mskI2CCON_I2C_STA;
 307   2            I2CCON &= ~mskI2CCON_I2C_AA;
 308   2            stI2C_RxHardware.fRx_Done = 1;
 309   2          break; 
 310   2           case 0xA0:      /*  after stop/re-start condition, swtich to not addressed slave mode */
 311   2            I2CCON &= ~mskI2CCON_I2C_STA;
 312   2            I2CCON &= ~mskI2CCON_I2C_AA;
 313   2            stI2C_RxHardware.fRx_Stop = 1;     
 314   2          break;         
 315   2              
 316   2          /*  Slave TX mode status 
 317   2              Step 1: Match address
 318   2              Step 2: Data byte in I2CDAT has been transmitted 
 319   2              Step 3: Stop data transmittion after last data  */    
 320   2          case 0xA8:      /*  after addr_ACK, write I2CDAT to transmitte first data */         
 321   2            I2CDAT = *stI2C_TxHardware.bptrTx_Buf++;
 322   2            if(stI2C_TxHardware.bptrTx_Buf > stI2C_TxHardware.bptrTx_EndAddress)
 323   2            {
 324   3              I2CCON &= ~mskI2CCON_I2C_AA;
 325   3            }
 326   2            else
 327   2            {
 328   3              I2CCON |= mskI2CCON_I2C_AA;
 329   3            }   
 330   2          break;
 331   2          case 0xB0:      /*  after arbitration lost and addr ACK, write I2CDAT to transmitte first data  */ 
 332   2            I2CDAT = *stI2C_TxHardware.bptrTx_Buf++;
 333   2            if(stI2C_TxHardware.bptrTx_Buf > stI2C_TxHardware.bptrTx_EndAddress)
 334   2            {
 335   3              I2CCON &= ~mskI2CCON_I2C_AA;
 336   3            }
 337   2            else
 338   2            {
 339   3              I2CCON |= mskI2CCON_I2C_AA;
 340   3            }
 341   2          break; 
 342   2          case 0xB8:      /*  after data_ACK, write I2CDAT to transmitte new data */  
 343   2            I2CDAT = *stI2C_TxHardware.bptrTx_Buf++;
 344   2            if(stI2C_TxHardware.bptrTx_Buf > stI2C_TxHardware.bptrTx_EndAddress)
 345   2            {
 346   3              I2CCON &= ~mskI2CCON_I2C_AA;
 347   3            }
 348   2            else
 349   2            {
 350   3              I2CCON |= mskI2CCON_I2C_AA;
 351   3            }
 352   2          break; 
 353   2          case 0xC0:      /*  after data_NACK, swtich to not addressed slave mode */ 
 354   2            I2CCON &= ~mskI2CCON_I2C_AA;
 355   2            stI2C_TxHardware.fTx_Stop = 1;
 356   2          break;   
 357   2          case 0xC8:      /*  after last data_ACK, swtich to not addressed slave mode */   
 358   2            I2CCON &= ~mskI2CCON_I2C_AA;
 359   2            stI2C_TxHardware.fTx_Done = 1;
 360   2          break;       
 361   2          
 362   2          default:        
 363   2            I2CCON &= ~mskI2CCON_I2C_STA;
C51 COMPILER V9.54   I2C                                                                   05/19/2022 10:01:02 PAGE 7   

 364   2            I2CCON |= mskI2CCON_I2C_STO;
 365   2          break;
 366   2        }
 367   1        
 368   1        /*  Clear interrupt flag by software is necessary for transmittion  */
 369   1        I2CCON &= ~mskI2CCON_I2C_FLAG;
 370   1      }
 371          
 372          /**
 373           *  @Brief    ISR_Adc
 374           *            ADC interrupt service routine
 375           */
 376          void ISR_I2c(void) interrupt ISRI2c
 377          {   
 378   1        I2C_ExecuteTransmission();
 379   1      }


MODULE INFORMATION:   STATIC OVERLAYABLE
   CODE SIZE        =    855    ----
   CONSTANT SIZE    =   ----    ----
   XDATA SIZE       =   ----    ----
   PDATA SIZE       =   ----    ----
   DATA SIZE        =     22      14
   IDATA SIZE       =   ----    ----
   BIT SIZE         =   ----       6
END OF MODULE INFORMATION.


C51 COMPILATION COMPLETE.  0 WARNING(S),  0 ERROR(S)
