How to select each option in Code Option?
Different chip declaration and different compiler software versions, Code Option has
different options to choose. The option meanings are as follows:
◆ Watchdog：
Always on―watchdog timer always enable；
Enable―watchdog timer enable in normal mode and slow mode and stops in green and sleep mode.
Disable―watchdog timer disable。
※ Note: When you select Always on option, the system will not enter sleep mode.
◆ Reset_Pin：
Pxx―select internal reset, the pin will be used as input only port;
Reset―select external reset；
※ Note: When you select internal reset, Pxx port is input only pin and without internal pull-up resistor.
◆ High_Clk：
IHRC_16M―High speed internal 16MHz RC oscillator;
Ext_RC―external RC oscillator；
32K_X'tal―external low-frequency crystal oscillator (such as 32.768KHz)；
4M_X'tal―external standard quartz oscillator or ceramic oscillator (usually in the 2M ~ 10MHz);
12M_X'tal―external high speed crystal oscillator or ceramic oscillator (typically 10MHz ~ 16MHz). 。
※ Note: IHRC_16M option only appears in high speed internal RC oscillator integrated circuit IC, when you select this option, XIN/XOUT pin will be used as general I/O port.
◆ Fcpu：
Fosc/1―instruction cycle = 1 clock cycle；
Fosc/2―instruction cycle = 2 clock cycles；
Fosc/4―instruction cycle= 4 clock cycles；
Fosc/8―instruction cycle = 8 clock cycles；
Fosc/16―instruction cycle = 16 clock cycles；
※ Note: When you select Noise_Filter Enable or IHRC_16M in Code Option, Fosc/1 and Fosc/2 of Fcpu option will be automatically disabled.
◆ Security：
enable―encrypt program code；
disable―not encrypt program code.
◆ Noise_Filter：
enable―enable noise filter.
disable―disable noise filter.
※ Note: When you enable noise filter function, which will improve the chip anti disturbance capability, Fosc/1 and Fosc/2 of Fcpu option will be automatically disabled.
◆ LVD：
LVD_L―LVD will reset chip if VDD is below 2.0V.
LVD_M―LVD will reset chip if VDD is below 2.0V. Enable LVD24 bit of PFLAG register for 2.4V low voltage indicator。
LVD_H―LVD will reset chip if VDD is below 2.4V. Enable LVD36 bit of PFLAG register for 3.6V low voltage indicator。
LVD_MAX―LVD will reset chip if VDD is below 3.6V.(only some type have, such as SN8P2522)
◆ Watchdog：
Always on―watchdog timer always enable；
Enable―watchdog timer enable in normal mode and slow mode and stops in green and sleep mode.
Disable―watchdog timer disable。
※ Note: When you select Always on option, the system will not enter sleep mode.
◆ Reset_Pin：
Pxx―select internal reset, the pin will be used as input only port;
Reset―select external reset；
※ Note: When you select internal reset, Pxx port is input only pin and without internal pull-up resistor.
◆ High_Clk：
IHRC_16M―High speed internal 16MHz RC oscillator;
Ext_RC―external RC oscillator；
32K_X'tal―external low-frequency crystal oscillator (such as 32.768KHz)；
4M_X'tal―external standard quartz oscillator or ceramic oscillator (usually in the 2M ~ 10MHz);
12M_X'tal―external high speed crystal oscillator or ceramic oscillator (typically 10MHz ~ 16MHz). 。
※ Note: IHRC_16M option only appears in high speed internal RC oscillator integrated circuit IC, when you select this option, XIN/XOUT pin will be used as general I/O port.
◆ Fcpu：
Fosc/1―instruction cycle = 1 clock cycle；
Fosc/2―instruction cycle = 2 clock cycles；
Fosc/4―instruction cycle= 4 clock cycles；
Fosc/8―instruction cycle = 8 clock cycles；
Fosc/16―instruction cycle = 16 clock cycles；
※ Note: When you select Noise_Filter Enable or IHRC_16M in Code Option, Fosc/1 and Fosc/2 of Fcpu option will be automatically disabled.
◆ Security：
enable―encrypt program code；
disable―not encrypt program code.
◆ Noise_Filter：
enable―enable noise filter.
disable―disable noise filter.
※ Note: When you enable noise filter function, which will improve the chip anti disturbance capability, Fosc/1 and Fosc/2 of Fcpu option will be automatically disabled.
◆ LVD：
LVD_L―LVD will reset chip if VDD is below 2.0V.
LVD_M―LVD will reset chip if VDD is below 2.0V. Enable LVD24 bit of PFLAG register for 2.4V low voltage indicator。
LVD_H―LVD will reset chip if VDD is below 2.4V. Enable LVD36 bit of PFLAG register for 3.6V low voltage indicator。
LVD_MAX―LVD will reset chip if VDD is below 3.6V.(only some type have, such as SN8P2522)